Contact Us
Simutest Inc
4800 Great America Parkway,
Suite 408,
Santa Clara. CA.
USA. 95054
Tel: 408-988-4032
Fax: 408-988-4034
Supported Test Systems
 
Welcome to Simutest
Product Information : Verifier
In order to meet the different semiconductor test needs in the fab-less, Integrated Device manufacturers and semiconductor foundries, Verifier is available in the following configurations.
Verifier-EX
The Verifier-EX configuration is a full-featured product that can be used within global design and test development team environments. The Verifier-EX includes the following modules:
  • VCD /EVCD and Generic tabular format reader
  • WGL or STIL format reader
  • Target tester format writer
  • Target tester format reader
  • PLI playback
  • Conditioners
  • Rule Analyzer
  • Simulation Vs. ATE test vector comparison
  • Tester rule checker
  • Graphical waveform display
  • VCD output (WGL or STIL output optional)
Verifier-LX
The Verifier-LX configuration is our mid-range product that can be used by test engineers to ensure that the simulation vectors optimally meet ATE requirements and include the following modules:
  • VCD /EVCD and tabular format reader
  • WGL or STIL format reader
  • Target tester format writer
  • Conditioners
  • Rule Analyzer
  • Simulation Vs. Cyclized test vector comparison
  • Tester rule checker
  • Waveform display
  • Cyclized VCD output
Verifier-DX
The Verifier-DX is a vector translation product that can be used in translation only product and includes:
  • VCD /EVCD and tabular format reader
  • WGL or STIL format reader
  • Target tester format writer
  • Conditioners
  • Tester rule checker
  • Waveform display
  • Cyclized VCD output
Verifier Features
  • Extracts timings, time sets and formats directly from simulation log files. For multiple simulation files generates optimal tester timings in incremental timing mode.
  • Long test patterns can be compressed via user selectable option for repeats, loops and subroutines
  • Comprehensive rule analyzer to quickly determine if there are any tester compatibility issues
  • PLI based playback feature allows designers to verify ATE test vectors before silicon to ensure test vectors comply with original design intent.
  • Can be seamlessly integrated into design flow.
  • Automatic conditioners eliminate any simulation artifacts or invalid data
  • Multi-channel waveform viewer to display simulation Vs. tester waveforms
Benefits
  • Reduces post-silicon debug time releases tester time for production and improved ROI.
  • Improves design/test collaboration and productivity.
  • Optimizes time to market
[previous]  1   2   3   4